GPIO Map: Difference between revisions

Revision as of 00:12, 9 March 2007

This map details the usage of each GPIO pin on the 5536. (Last updated March 8, 2007): If blank, B1 and A are the same as B2.

PIN	B2 Usage	B1	A	Input	Output	Notes	OUTPUT_ENABLE	OUT_AUX1	INPUT_ENABLE	IN_AUX1	INPUT_EVENT_ENABLE
0	PCI_INTA#			X		PCI Interrupt			X		X
1	MIC_AC#/DC	PCSPK	PCSPK		X	Controls the AC/DC input on the microphone	X
2	GPIO2		IRQ15	X		Reads memory strap			X
3	VGA SCL			-	-	EDID line - not needed for XO machine
4	VGA SDA			-	-	EDID line - not needed for XO machine
5	DCONSTAT0			X		DCON status pin (1 of 2)			X
6	DCONSTAT1		DCONMODE>	X		DCON status pin (2 of 2)			X
7	DCONIRQ#		PCI_INTB#	X		DCON Interrupt PIN			X		X
8	UART1_TX				X	UART Transmit	X	X
9	UART1_RX			X		UART Receive			X	X
10	THERM_ALARM		N/C	X		Thermal Alarm input			X	X
11	DCONLOAD		P/U		X	Output indicator for DCON	X
12	DCONBLNK			X		DCON Signal			X
13	SMI#				X	SMI# pin to the GX	X
14	SMB_CLK			-	-	SMBus clock	-	X	-	X
15	SMB_DATA			-	-	SMBus data	-	X	-	X
16	LPC_AD0			-	-	Defaults to LPC - no GPIO control
17	LPC_AD1			-	-	Defaults to LPC - no GPIO control
18	LPC_AD2			-	-	Defaults to LPC - no GPIO control
19	LPC_AD3			-	-	Defaults to LPC - no GPIO control
20	LPC_DRQ_L			-	-	Defaults to LPC - no GPIO control
21	LPC_SERIRQ			-	-	Defaults to LPC - no GPIO control
22	LPC_FRAME_L			-	-	Defaults to LPC - no GPIO control
24	WORK_AUX				X	Controls MAIN_ON (which controls VCORE_CPU)	X	X
25	SWI#			X		Unknown - line comes from GPIO2 on the EC
26	PWR_BUT_in		N/C	X		Lid event			X		X
27	SCI#			X		SCI from the EC for power and battery events			X		X
28	PWR_BUT#			X		Power button input			X	X

@@ Line 5: / Line 5: @@
 {| border="1"
 ! PIN !! B2 Usage !! B1 !! A !! Input !! Output !! Notes !! OUTPUT_ENABLE !! OUT_AUX1 !! OUT_AUX2 !! INPUT_ENABLE !! IN_AUX1 !! INPUT_EVENT_ENABLE
+|-
+|0 || PCI_INTA# || || || X || || PCI Interrupt || || || || X ||  || X ||
 |-
 |1 || MIC_AC#/DC || PCSPK || PCSPK || || X || Controls the AC/DC input on the microphone || X || || || || ||
@@ Line 18: / Line 20: @@
 |6 || DCONSTAT1 || || DCONMODE> || X || || DCON status pin (2 of 2)  || || || || X || ||
 |-
-|7 || DCONIRQ || || PCI_INTB || X || || DCON Interrupt PIN || || || || X ||  || X
+|7 || DCONIRQ# || || PCI_INTB# || X || || DCON Interrupt PIN || || || || X ||  || X
 |-
 |8 || UART1_TX || || ||  || X || UART Transmit || X || X || || || ||