XO1.5 WLAN power ECO: Difference between revisions
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(New page: =Scope= This describes a change to early prototypes of the XO-1.5 motherboard. It fixes a problem with the VX855 chip maintaining power on one of it's SDIO ports when the s...) |
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# Cut the trace between the via and Q38, pin 2. |
# Cut the trace between the via and Q38, pin 2. |
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# Wire Q38, pin 2 to WLAN_EN#, at the side of R321 that does not connect to +3.3VSUS. |
# Wire Q38, pin 2 to WLAN_EN#, at the side of R321 that does not connect to +3.3VSUS. R321 is located right above the VX855, in a block of resistors that are labelled separately. |
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[[Category:Hardware]] |
[[Category:Hardware]] |
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Revision as of 18:33, 9 October 2009
Scope
This describes a change to early prototypes of the XO-1.5 motherboard. It fixes a problem with the VX855 chip maintaining power on one of it's SDIO ports when the system enters suspend. Boards without this ECO will loose their wireless network interface after being suspended.
This only applies to XO-1.5 B2 phase motherboards.
Problem Description
The third SDIO port on the VX855 can't maintain power through a suspend. This ECO moves the control pin to the unrelated GPIO2 (MSDT) output, U19.AL20.
Procedure
- Cut the trace between the via and Q38, pin 2.
- Wire Q38, pin 2 to WLAN_EN#, at the side of R321 that does not connect to +3.3VSUS. R321 is located right above the VX855, in a block of resistors that are labelled separately.