Watchdog: Difference between revisions

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(Created page with 'A watchdog timer is built into the XO-1.75 and XO-3, as part of the CPU. What is a watchdog timer? See [http://en.wikipedia.org/wiki/Watchdog_timer Watchdog timer on Wikipedia]…')
 
m (Open Firmware proper name)
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* checks if the current restart of the SoC was caused by watchdog, and if so displays "watchdog restart" on the serial port, and sends a power cycle command to the embedded controller.
* checks if the current restart of the SoC was caused by watchdog, and if so displays "watchdog restart" on the serial port, and sends a power cycle command to the embedded controller.


== OpenFirmware ==
== Open Firmware ==


* normally does nothing with the watchdog,
* normally does nothing with the watchdog,
* can start the watchdog for testing,
* can start the watchdog for testing,
* can provide the watchdog function to any deployment application written to run under OpenFirmware.
* can provide the watchdog function to any deployment application written to run under Open Firmware.


== Linux ==
== Linux ==

Revision as of 17:43, 24 January 2012

A watchdog timer is built into the XO-1.75 and XO-3, as part of the CPU.

What is a watchdog timer? See Watchdog timer on Wikipedia.


CForth

  • configures the watchdog clocks, making the watchdog ready to be used, but without turning on counting,
  • checks if the current restart of the SoC was caused by watchdog, and if so displays "watchdog restart" on the serial port, and sends a power cycle command to the embedded controller.

Open Firmware

  • normally does nothing with the watchdog,
  • can start the watchdog for testing,
  • can provide the watchdog function to any deployment application written to run under Open Firmware.

Linux

  • normally does nothing with the watchdog,

Runin

  • normally does nothing with the watchdog,
  • can start the watchdog for unattended hang detection, allowing a hang to be detected, logged, and then corrected,

See /runin/sdkit-arm/watchdog and /runin/sdkit-arm/watchdog.fth for more details.

Internals

The watchdog timer in the ARMADA 610 is a 16-bit counter configured for 256 Hz operation. The counter can be read or cleared. It counts up by one every 3.9ms.

d408.006c: |                               | | | | | | | | | | | | | | | | |   timers watchdog value register (read-only)
d408.0098: |                                                             |C|   timers watchdog counter reset register (write-only)

Another register contains a match value. This may be set to a value from 3.9ms to four minutes and 12 seconds.

d408.0068: |                               | | | | | | | | | | | | | | | | |   timers watchdog match register

Yet another register can be used turn on and off counting, and to configure the response to a match.

d408.0064: |                                                           |R|C|   timers watchdog match enable register 

The response can be one of:

  • send an interrupt (R=0),
  • restart the processor (R=1).

We use the restart response.

Lastly another register shows whether the watchdog timer caused a reset.

d408.0070: |                                                             |r|   timers watchdog status register