XO1.5 WLAN power ECO: Difference between revisions
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==Problem Description== |
==Problem Description== |
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The third SDIO port on the VX855 can't maintain power through a suspend. This ECO moves the control pin to |
The third SDIO port on the VX855 can't maintain power through a suspend. This ECO moves the control pin to an embedded controller GPIO10 at U28.37. |
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=Procedure= |
=Procedure= |
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# Cut the trace between the via and Q38, pin 2. |
# Cut the trace between the via and Q38, pin 2. |
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# Remove R398 (located on the "top" side of the motherboard, underneath the EC.) |
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# Wire Q38, pin 2 to WLAN_EN#, at the side of R321 that does not connect to +3.3VSUS. R321 is located right above the VX855, in a block of resistors that are labelled separately. |
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# Wire Q38, pin 2 to the side of R398 that is not connected to R401. |
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=Test Procedure= |
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In order to test firmware for the B3 build, the following hybrid ECO is performed. ''Do not do this unless you are testing B3 firmware on a B2!'' |
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In this ECO, the EC is placed in control of the power to the internal SD slot, not WLAN. |
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# Cut the trace between the via and Q28, pin 2 (not the trace from Q28.2 to R268). |
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# Remove R398 (located on the "top" side of the motherboard, underneath the EC.) |
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# Wire Q28, pin 2 to the side of R398 that is not connected to R401. |
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[[Category:Hardware]] |
[[Category:Hardware]] |
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Revision as of 19:36, 28 October 2009
Scope
This describes a change to early prototypes of the XO-1.5 motherboard. It fixes a problem with the VX855 chip maintaining power on one of it's SDIO ports when the system enters suspend. Boards without this ECO will loose their wireless network interface after being suspended.
This only applies to XO-1.5 B2 phase motherboards.
Problem Description
The third SDIO port on the VX855 can't maintain power through a suspend. This ECO moves the control pin to an embedded controller GPIO10 at U28.37.
Procedure
- Cut the trace between the via and Q38, pin 2.
- Remove R398 (located on the "top" side of the motherboard, underneath the EC.)
- Wire Q38, pin 2 to the side of R398 that is not connected to R401.
Test Procedure
In order to test firmware for the B3 build, the following hybrid ECO is performed. Do not do this unless you are testing B3 firmware on a B2!
In this ECO, the EC is placed in control of the power to the internal SD slot, not WLAN.
- Cut the trace between the via and Q28, pin 2 (not the trace from Q28.2 to R268).
- Remove R398 (located on the "top" side of the motherboard, underneath the EC.)
- Wire Q28, pin 2 to the side of R398 that is not connected to R401.