XO1.75 A3 B1 Changes: Difference between revisions

From OLPC
Jump to navigation Jump to search
Line 40: Line 40:
==Processor Voltage Selection==
==Processor Voltage Selection==


The processor voltage selection mechanism needs to modified so the software controlled pin is ignored when the hardware controlled pin is asserted.
The processor voltage selection mechanism needs to modified so the software controlled pin (VID0) is ignored when the hardware controlled pin (VID1) is asserted, changing vcore to the idle voltage.


==Antitheft System==
==Antitheft System==

Revision as of 01:59, 21 June 2011

These are the changes planned for the XO-1.75 B1 prototype, from the A3 prototypes.

A3 Electrical Fixes

SMBus Pullups

These correct a mistake omitting the pullup resistors for the SMBus between the EC and the battery charger.

  • Add a 1.3K resistor between PR200 and +3.3VSUS.
  • Add a 1.3K resistor between PR201 and +3.3VSUS.

Audio Analog Power

This corrects a wiring mistake (Trac ticket 10974).

  • Change +3.3VA_AUDIO to be +3.3V_AVDD.

External SD Power

Ensure that the EN_SD2_PWR# signal is wired to all components in the layout.

RTC Power

Please change R29 to a 330 ohm resistor, and change C227 to have a value of 10 uF.

Input Protection

Change to the input protection suggested by S.F. Chen, reducing the number of components.

USB Power

The USB power switch should be improved to actually support close to 1A output on most laptops.

All of the A3 prototypes trip with overcurrent at less than 0.6A.

LCD Power Supply

We've seen repeated failures of PD3. It will be replaced with a higher rated diode.

Processor Voltage Selection

The processor voltage selection mechanism needs to modified so the software controlled pin (VID0) is ignored when the hardware controlled pin (VID1) is asserted, changing vcore to the idle voltage.

Antitheft System

We need to add antitheft protection to the A3 design. This consists of a circuit which can be triggered from OFW. Once triggered, the circuit should disable:

  • write access from the SoC to the OFW SPI Flash
  • write access to the EC internal Flash through the EDI interface

The antitheft circuit, once triggered, should only be cleared by a signal which also forces a reset of the main/security processor, such as SOC_RESET#.

Display Power Sequencing

The display power enable circuitry needs to be sequenced properly to turn off the display completely. Trac ticket #10964

Vcore Improvements

A solution to Trac ticket #10901 should be implemented.

Restore DCON SDRAM

In case Marvell can't provide the expected power savings, this SDRAM will allow us to support video output in S3 as in XO-1.5. It will be co-located with the internal SD slot.

A3 Layout Fixes

Moving the RTC Battery

The RTC battery should be moved to a location where the battery isn't under the heat spreader and where it can be easily attached to the motherboard. It doesn't have to be close to the battery charger.

Clean up the RTC Ground

The RTC crystal is poorly bypassed, causing noise on the crystal input. The layout rules in the data sheet (particularly the part about tying the grounds of the two bypass caps together) should be followed.

EC Connector and the Heat Spreader

The EC connector is under the proposed heat spreader. This is generally agreed to be OK.

Relocate OSL Sensor

The OSL sensor (LED14) should be placed immediately above (away from the board edge of) the WLAN indicator LED: LED5 (or LED11, whichever is on the top side of the MB). It should be placed as close as possible.

Planned Feature Changes