Geode instruction set: Difference between revisions
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:see [[Hardware specification]] and [http://www.amd.com/files/connectivitysolutions/geode/geode_lx/33234E_LX_databook.pdf AMD's Geode LX data book] |
:see [[Hardware specification]] and [http://www.amd.com/files/connectivitysolutions/geode/geode_lx/33234E_LX_databook.pdf AMD's Geode LX data book] |
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==General== |
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Generally speaking, the '''Geode''' processor supports the '''i686''' (Pentium Pro) instruction set plus '''MMX''' and '''3DNow! Enhanced''' instructions. |
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==PFRCPV== |
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Generally speaking, the '''Geode''' processor supports the i686 (Pentium Pro) instruction set, though it is not a complete Pentium Pro clone since many other features new to Pentium Pro, such as PAE and MTRR, are not supported. MMX and 3DNow! Enhanced instructions are also supported, (and indicated by the correct CPUID bits), so applications which check those bits should use MMX as usual. Additionally, there are some special AMD Geode instructions, but they are not used by the GNU compiler. |
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Opcode "0F 0F / 86" is "PFRCPV xr,xr/m64". It performs floating-point reciprocal approximation for a pair of 32-bit floats in an MMX register. It is like the PFRCP instruction, except that it operates on a pair of values. |
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==PFRSQRTV== |
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== Specific Instruction Sets == |
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Opcode "0F 0F / 86" is "PFRSQRTV xr,xr/m64". It performs floating-point reciprocal square root approximation for a pair of 32-bit floats in an MMX register. It is like the PFRSQRT instruction, except that it operates on a pair of values. |
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==INT1== |
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* i686 (Pentium Pro) |
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Opcode "F1" is "INT1", a 1-byte version of the "INT 1" ("CD 01") instruction. This instruction is also known as ICEBP, and is in fact available (but mostly undocumented) on all x86 processors since the 80386. |
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* MMX |
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* AMD 3DNow! Enhanced |
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==SALC== |
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Opcode "D6" is "SALC", documented as "SETALC" with an incorrect description. This instruction sets all bits of AL to the carry flag. As with INT1, this instruction is available on all processors. |
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==Other== |
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There are numerous kernel-only instructions and MSRs for dealing with an extra debug mode, for directly loading and saving the normally-hidden segment state (base, limit, etc.) and so on. |
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[[Category:Hardware]] |
[[Category:Hardware]] |
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Revision as of 18:40, 2 September 2007
General
Generally speaking, the Geode processor supports the i686 (Pentium Pro) instruction set plus MMX and 3DNow! Enhanced instructions.
PFRCPV
Opcode "0F 0F / 86" is "PFRCPV xr,xr/m64". It performs floating-point reciprocal approximation for a pair of 32-bit floats in an MMX register. It is like the PFRCP instruction, except that it operates on a pair of values.
PFRSQRTV
Opcode "0F 0F / 86" is "PFRSQRTV xr,xr/m64". It performs floating-point reciprocal square root approximation for a pair of 32-bit floats in an MMX register. It is like the PFRSQRT instruction, except that it operates on a pair of values.
INT1
Opcode "F1" is "INT1", a 1-byte version of the "INT 1" ("CD 01") instruction. This instruction is also known as ICEBP, and is in fact available (but mostly undocumented) on all x86 processors since the 80386.
SALC
Opcode "D6" is "SALC", documented as "SETALC" with an incorrect description. This instruction sets all bits of AL to the carry flag. As with INT1, this instruction is available on all processors.
Other
There are numerous kernel-only instructions and MSRs for dealing with an extra debug mode, for directly loading and saving the normally-hidden segment state (base, limit, etc.) and so on.