XO1.75 B1 C1 Changes
These are the changes planned for the XO-1.75 C1 prototype, from the B1 prototypes.
C1 Electrical Fixes
Improved MPPT
The circuit generating the PWR_LIMIT_ON needs to be modified to only assert the signal if power limiting is turned on. On B1, it is asserted whenever the laptop is accepting power from the DC input (power limited or not). [Remove PR227, change PR244 to 4.7K, remove PR229 and populate w. a 0.1 uF)
The LV_SET signal should change to a EC PWM output (PWM2, pin 26), allowing a greater voltage swing than the EC DAC output. The OLS_CATHODE signal moves to GPIO30 (pin 54) as a result.
Fix RTC Power
It turns out that the IDT1338 is woefully underspec'ed, and needs a power-down time of 2 mS across all production parts to properly preserve the time, not the 300 uS reported by the data sheet. The vendor is looking into this, but a switch will be added in the power line of the IDT1338 to cheaply provide a nice, slow power-down.
Modify Vcore supply
The Vcore suply voltages should be 1.345V nominal and 1.25V nominal, instead of 1.40V and 1.345V as it is now.
Increase bulk bypassing
Add another 22 uF of capacitor to the +3.3V rail (populate PC54).
This was instead fixed by adding a capacitor and resistor (R384/C377, R385/C378) to the control signals, increasing the turn-on and turn-off times.
Additional bulk bypassing (3 x 2.2uF) was added around the eMMC device.
Pullups on Accelerometer
Both <trac>11041</trac> or <trac>10882</trac> are caused by a lack of external pullups on the I2C bus. 1.3K pullups to should be added between G_SENSOR_SDA/G_SENSOR_SCL and +1.8V_GPIO. VDD_IO on the Accelerometer (U15) should be tied to +1.8V_GPIO, not +1.8V. Same with U5.
Memory Size Select
The XO-1.75 uses GPI0s 1 and 0 to indicate the amount of memory present on the motherboard.
| Memory Size | |
| 0 | 512 MB |
| 1 | 1 GB |
| 2 | 2 GB |
| 3 | undefined |
Move OLS
The OLS diode should be moved to be located next to LED4, and blanking circuitry added to control it.
The existing blanking circuitry (D19 and R379) should be removed.
New circuitry needs to be added around Q14.
ADET protection
The voltage on the ADET input to the battery charger may be excessive in B1 units. This will not be fatal, but is not recommended by the manufacturer. The ADET input will have its own voltage divider, w. a zener to prevent overvoltage of the charger.
Microphone Bias
The impedance of the microphone bias circuit will be increased from 680 ohm to 3Kohm, along with the addition of a single pole low pass filter w. a 3dB point below 20 Hz. The measurable range at the microphone socket will change from -3V - +3V to -0.3V - +3V.
Sleep Indicator
A wire will be added allowing the EC to monitor the state of the SoC, via the SLEEP_IND signal output by the SoC. This will attach to EC GPI 0B.
C1 Layout Fixes
Internal SD Select
With the replacement of the full-size internal SD slot with a latching microSD slot, there is no longer a card detect signal generated to automatically switch the boot device.
We need to increase the size of R341/R341 to 0603 or 0805, and label them somehow.
Move OLS
The OLS diode (LED14) should be next to LED4, not LED5. Clearance with the mainframe and lightpipe aperture needs to be checked.
Improve Right Speaker
We use a class D speaker amplifier, which uses the actual voice coil as the inductor low pass filtering the energy transfer from the current pulses to audio frequency cone movement. Unfortunately, we were using too high of a trace impedance, and it was ringing violently at the high frequencies used by the amplifier pulses.
The trace impedance will be halved by doubling the trace width.
Planned Feature Changes
Camera Power
GPIO144 newly tied to CAM_PWRDN, depending on camera source change.