Measure/Projects/Signal-Generator

Purpose of a signal generator

A number of Measure activities require a "signal generator" -- a electronic device to create sine waves of known frequency in the audible range, i.e. rougly in the range of a piano keyboard (0 Hertz (cycles per second) to 2500 Hz.) Perhaps the laptop itself can be used this way too. But a goal of the design described here is to double as a "voltage-to-frequency converter" -- put in +1.000 volts and get out 1000 Hz, put in 0.440 volts and get out A-440, the international tuning pitch.

Specifications

• Frequency range -- 0 Hz to approximately 2500 Hz
• Frequency accuracy -- ideal is +/- 1 cycle, but unlikely. Calculations indicate +/-0.5% is possible in the range of 0 to 2000 Hz, i.e. +/-10 cycles at 2000 Hz with variations of power voltage 4.5 volts to 5.5 volts. Trim to +/-1 Hz at 1000 Hz and 1.000 volts input.
• Cost target -- under $10 US total parts cost in 100 piece quantity.
• External voltage input -- 0 to +5 volts relative to circuit ground. No harm should come to the circuit or laptop if the voltage is reversed.
• Output --

• Triangle wave: 1.00 volt peak-to-peak triangle wave (TBD -- goal is 2.00 volts peak-to-peak to improve accuracy but there are issues with the opamps) into a "homemade" speaker, symmetric to 1 part per thousand (the goal: actual TBD) around common voltage Vcom (actual signal peaks levels relative to Vcom may be +/-0.005 volts.)
• Sine wave: TBD. Derived from the triangle wave and shaped by diode limiters.
• Square wave: TBD. Derived from the triangle wave and shaped by a comparator.
• Vcom: "Common" or reference voltage for the triangle wave: 1.50 volts +/0.005 volts (TBD).

Detailed circuit description

This circuit is uses some design concepts of the Measure/Projects/Oscilloscope probe, in particular the circuit's voltage reference derived from a TL431ACZ and the level-shifting and input protection achieved with a differential amplifier.

This oscillator falls in the general class of oscillators known as the hysteresis RC oscillator -- RC for Resistance-Capacitance, "hysteresis" for the fact that it derives its memory from feedback.

The design evolved from the intention to achieve the highest possible accuracy with the lowest cost and most readily-available parts.

A couple of common RC oscillator circuits exist: the 555 timer and the hysteresis oscillator. Both employ two thresholds or voltage-comparison points -- an upper and a lower threshold -- and a memory. There are other possibilities for oscillators -- in particular the Colpitts oscillator, the quadrature oscillator, the phase-delay oscillator. Neither lend themselves to variable frequency generation.

I experimented with a number of RC versions:

• (1) traditional 555 timer (contains two voltage comparators and a flip-flop memory) -- discarded because the two voltage comparision points (the upper and lower thresholds) are not accurate enough in a given part, and they vary from unit to unit.
• (2) circuit similar to a 555 timer, i.e. built instead with two accurate voltage references (upper and lower thresholds accurage to 0.001 volt), 2 LM339A comparators (4 in a package) and a flip-flop built with the other two comparartors. Surprisingly, this circuit has too much transition delay (i) between actually sensing that the voltage from the integrator has hit a threshold, and (ii) actually propagating this information to the flip-flop. Various efforts to improve this failed.
• (3) Hysteresis flip-flop without use of analog switch: The LM393A or LM339A comparator has a distinct non-zero output caused by the saturated output transistor (either FET or a bipolar). This caused an error.
• (4) Hysteresis flip-flop with analog switch, voltage-fed: Derive the upper and lower threshold voltages from a resistor ladder fed and buffer these voltages with op amps. Feed these two voltages to an analog switch -- a Maxim MAX4544CPA Single-Pole-Double-Throw (SPDT) analog switch.

In all the above cases, the design integrates current from an input voltage +/-Vin through R into capacitance C. That is, the voltage across the capacitor is caused by the electrical charge Q in the capacitor divided by its capacitance C: Vcap = Q/C. This change in charge Q1 - Q0 represents the accumulation (integral) of the current i (amperes per second) times the time duration (T1-T0) that the current is flowing into or out of capacitance C: (Q1-Q0) = i*(T1-T0). In this design, current i is forced into capacitor C at a known rate i.e. i = Vin/R. So these three equations:

Vcap = Q/C; change in capacitor voltage (Vcap1 - Vcap) = (Q1 - Q0)/C

Q = i*T; change in capactior charge (Q1 - Q0) = i*(T1 - T0)

i = Vin/R, a constant

yield the change in capacitor voltage during the time interval (T1 - T0):

(Vcap1 - Vcap0) = (Q1-Q0)/C = (i*(T1-T0))/C = ((Vin/R)*(T1-T0))/C = Vin*(T1-T0)/(R*C).

There are four intervals or "phases" during a cycle of charging and discharging between the upper threshold-voltage Vu and the lower threshold voltage VL:

(1) Capacitor voltage Vcap is 0, current is pushed into capacitor C and Vcap charges to Vu: (Vu - 0) = +Vin*(T1-0)/RC

(2) Capacitor voltage starts at Vcap1, but now Vin changes sign to minus, the current is sucked out of capacitor C, and C discharges to 0: (0 - Vcap) = -Vin*(T2-T1)/RC

(3) Capacitor voltage starts at 0 again but continues to disharge to VL: (VL - 0) = -Vin*(T3-T2)/RC

(4) Capactior voltage starts at VL, but now Vin changes sign to plus, the current i is pushed into capacitor C, charges to 0: (0 - Vl) = +Vin*(T4-T3).