GPIO Map
Current GPIO Map
This map details the usage of each GPIO pin on the 5536. (Last updated March 8, 2007): If blank, B1 and A are the same as B2.
| PIN | B2 Usage | B1 | A | In | Out | Notes | OUTPUT _ENABLE |
OUT _AUX1 |
OUT _AUX2 |
INPUT _ENABLE |
IN _AUX1 |
INPUT _EVENT_ENABLE | |
| 0 | PCI_INTA# | X | PCI Interrupt | X | X | ||||||||
| 1 | MIC_AC#/DC | PCSPK | PCSPK | X | Controls the AC/DC input on the microphone | X | |||||||
| 2 | GPIO2 | IRQ15 | X | Reads memory strap | X | ||||||||
| 3 | VGA SCL | - | - | EDID line - not needed for XO machine | |||||||||
| 4 | VGA SDA | - | - | EDID line - not needed for XO machine | |||||||||
| 5 | DCONSTAT0 | X | DCON status pin (1 of 2) | X | |||||||||
| 6 | DCONSTAT1 | DCONMODE> | X | DCON status pin (2 of 2) | X | ||||||||
| 7 | DCONIRQ# | PCI_INTB# | X | DCON Interrupt PIN | X | X | |||||||
| 8 | UART1_TX | X | UART Transmit | X | X | ||||||||
| 9 | UART1_RX | X | UART Receive | X | X | ||||||||
| PIN | B2 Usage | B1 | A | In | Out | Notes | OUTPUT _ENABLE |
OUT _AUX1 |
OUT _AUX2 |
INPUT _ENABLE |
IN _AUX1 |
INPUT _EVENT_ENABLE | |
| 10 | THERM_ALARM | N/C | X | Thermal Alarm input | X | X | |||||||
| 11 | DCONLOAD | P/U | X | Output indicator for DCON | X | ||||||||
| 12 | DCONBLNK | X | DCON Signal | X | |||||||||
| 13 | SMI# | X | SMI# pin to the GX | X | |||||||||
| 14 | SMB_CLK | X | X | SMBus clock | X | X | X | X | |||||
| 15 | SMB_DATA | X | X | SMBus data | X | X | X | X | |||||
| 16 | LPC_AD0 | - | - | Defaults to LPC - no GPIO control | |||||||||
| 17 | LPC_AD1 | - | - | Defaults to LPC - no GPIO control | |||||||||
| 18 | LPC_AD2 | - | - | Defaults to LPC - no GPIO control | |||||||||
| 19 | LPC_AD3 | - | - | Defaults to LPC - no GPIO control | |||||||||
| PIN | B2 Usage | B1 | A | In | Out | Notes | OUTPUT _ENABLE |
OUT _AUX1 |
OUT _AUX2 |
INPUT _ENABLE |
IN _AUX1 |
INPUT _EVENT_ENABLE | |
| 20 | LPC_DRQ_L | - | - | Defaults to LPC - no GPIO control | |||||||||
| 21 | LPC_SERIRQ | - | - | Defaults to LPC - no GPIO control | |||||||||
| 22 | LPC_FRAME_L | - | - | Defaults to LPC - no GPIO control | |||||||||
| 24 | WORK_AUX | X | Controls MAIN_ON (which controls VCORE_CPU) | X | X | ||||||||
| 25 | SWI# | X | Unknown - line comes from GPIO2 on the EC | ||||||||||
| 26 | PWR_BUT_in | N/C | X | Lid event | X | X | |||||||
| 27 | SCI# | X | SCI from the EC for power and battery events | X | X | ||||||||
| 28 | PWR_BUT# | X | Power button input | X | X | ||||||||
| PIN | B2 Usage | B1 | A | In | Out | Notes | OUTPUT _ENABLE |
OUT _AUX1 |
OUT _AUX2 |
INPUT _ENABLE |
IN _AUX1 |
INPUT _EVENT_ENABLE |
Changes
Jan 15, 2007 (B2)
- GPIO1 changes from AC_BEEP to MIC_AC#/DC output
- GPIO10 changes from unused to THRM_ALARM input
- GPIO26 changes from unused to PWR_BUT_in input
