GPIO Map: Difference between revisions
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JordanCrouse (talk | contribs) (Update map for B2) |
(Corrected input vs. output errors and added B1 and A columns) |
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== Current GPIO Map == |
== Current GPIO Map == |
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This map details the usage of each GPIO pin on the 5536. (Last updated |
This map details the usage of each GPIO pin on the 5536. (Last updated March 8, 2007): |
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If blank, B1 and A are the same as B2. |
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{| border="1" |
{| border="1" |
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! PIN !! Usage !! Input !! Output !! Notes !! OUTPUT_ENABLE !! OUT_AUX1 !! OUT_AUX2 !! INPUT_ENABLE !! IN_AUX1 !! INPUT_EVENT_ENABLE |
! PIN !! B2 Usage !! B1 !! A !! Input !! Output !! Notes !! OUTPUT_ENABLE !! OUT_AUX1 !! OUT_AUX2 !! INPUT_ENABLE !! IN_AUX1 !! INPUT_EVENT_ENABLE |
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|1 || MIC_AC#/DC || |
|1 || MIC_AC#/DC || PCSPK || PCSPK || || X || Controls the AC/DC input on the microphone || X || || || || || |
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|2 || GPIO2 || X || || Reads memory strap || || || || X || || |
|2 || GPIO2 || || IRQ15 || X || || Reads memory strap || || || || X || || |
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|3 || VGA SCL || - || - || EDID line - not needed for XO machine |
|3 || VGA SCL || || || - || - || EDID line - not needed for XO machine |
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|4 || VGA SDA || - || - || EDID line - not needed for XO machine |
|4 || VGA SDA || || || - || - || EDID line - not needed for XO machine |
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|5 || DCONSTAT0 || X || || DCON status pin (1 of 2) || || || || X || || |
|5 || DCONSTAT0 || || || X || || DCON status pin (1 of 2) || || || || X || || |
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|6 || DCONSTAT1 || X || || DCON status pin (2 of 2) || || || || X || || |
|6 || DCONSTAT1 || || DCONMODE> || X || || DCON status pin (2 of 2) || || || || X || || |
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|7 || DCONIRQ || X || || DCON Interrupt PIN || || || || X || || X |
|7 || DCONIRQ || || PCI_INTB || X || || DCON Interrupt PIN || || || || X || || X |
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|8 || UART1_TX || || X || UART Transmit || X || X || || || || |
|8 || UART1_TX || || || || X || UART Transmit || X || X || || || || |
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|9 || UART1_RX || || X || UART Receive || || || || X || X || |
|9 || UART1_RX || || || X || || UART Receive || || || || X || X || |
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|10 || THERM_ALARM || X || || Thermal Alarm input || || || || X || X || |
|10 || THERM_ALARM || || N/C || X || || Thermal Alarm input || || || || X || X || |
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|11 || DCONLOAD || || X || Output indicator for DCON || X || || || || || |
|11 || DCONLOAD || || P/U || || X || Output indicator for DCON || X || || || || || |
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|12 || DCONBLNK || || X || DCON Signal || |
|12 || DCONBLNK || || || X || || DCON Signal || || || || X || || |
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|13 || SMI# || || X || SMI# pin to the GX || X || || || || || |
|13 || SMI# || || || || X || SMI# pin to the GX || X || || || || || |
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|14 || SMB_CLK || - || - || SMBus clock || || X || || |
|14 || SMB_CLK || || || - || - || SMBus clock || - || X || || - || X || |
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|15 || SMB_DATA || - || - || SMBus data || || X || || |
|15 || SMB_DATA || || || - || - || SMBus data || - || X || || - || X || |
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|16 || LPC_AD0 || - || - || Defaults to LPC - no GPIO control |
|16 || LPC_AD0 || || || - || - || Defaults to LPC - no GPIO control |
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|17 || LPC_AD1 || - || - || Defaults to LPC - no GPIO control |
|17 || LPC_AD1 || || || - || - || Defaults to LPC - no GPIO control |
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|18 || LPC_AD2 || - || - || Defaults to LPC - no GPIO control |
|18 || LPC_AD2 || || || - || - || Defaults to LPC - no GPIO control |
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|19 || LPC_AD3 || - || - || Defaults to LPC - no GPIO control |
|19 || LPC_AD3 || || || - || - || Defaults to LPC - no GPIO control |
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|20 || LPC_DRQ_L || - || - || Defaults to LPC - no GPIO control |
|20 || LPC_DRQ_L || || || - || - || Defaults to LPC - no GPIO control |
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|21 || LPC_SERIRQ || - || - || Defaults to LPC - no GPIO control |
|21 || LPC_SERIRQ || || || - || - || Defaults to LPC - no GPIO control |
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|22 || LPC_FRAME_L || - || - || Defaults to LPC - no GPIO control |
|22 || LPC_FRAME_L || || || - || - || Defaults to LPC - no GPIO control |
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|24 || WORK_AUX || || X || Controls MAIN_ON (which controls VCORE_CPU) || X || X || || || || |
|24 || WORK_AUX || || || || X || Controls MAIN_ON (which controls VCORE_CPU) || X || X || || || || |
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|25 || |
|25 || SWI# || || || X || || Unknown - line comes from GPIO2 on the EC |
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|26 || PWR_BUT_in || X || || Lid event || || || || X || || X |
|26 || PWR_BUT_in || || N/C || X || || Lid event || || || || X || || X |
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|27 || SCI# || X || || SCI from the EC for power and battery events || || || || X || || X |
|27 || SCI# || || || X || || SCI from the EC for power and battery events || || || || X || || X |
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|28 || PWR_BUT# || X || || Power button input || || || || X || X || |
|28 || PWR_BUT# || || || X || || Power button input || || || || X || X || |
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Revision as of 23:31, 8 March 2007
Current GPIO Map
This map details the usage of each GPIO pin on the 5536. (Last updated March 8, 2007): If blank, B1 and A are the same as B2.
PIN | B2 Usage | B1 | A | Input | Output | Notes | OUTPUT_ENABLE | OUT_AUX1 | OUT_AUX2 | INPUT_ENABLE | IN_AUX1 | INPUT_EVENT_ENABLE |
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1 | MIC_AC#/DC | PCSPK | PCSPK | X | Controls the AC/DC input on the microphone | X | ||||||
2 | GPIO2 | IRQ15 | X | Reads memory strap | X | |||||||
3 | VGA SCL | - | - | EDID line - not needed for XO machine | ||||||||
4 | VGA SDA | - | - | EDID line - not needed for XO machine | ||||||||
5 | DCONSTAT0 | X | DCON status pin (1 of 2) | X | ||||||||
6 | DCONSTAT1 | DCONMODE> | X | DCON status pin (2 of 2) | X | |||||||
7 | DCONIRQ | PCI_INTB | X | DCON Interrupt PIN | X | X | ||||||
8 | UART1_TX | X | UART Transmit | X | X | |||||||
9 | UART1_RX | X | UART Receive | X | X | |||||||
10 | THERM_ALARM | N/C | X | Thermal Alarm input | X | X | ||||||
11 | DCONLOAD | P/U | X | Output indicator for DCON | X | |||||||
12 | DCONBLNK | X | DCON Signal | X | ||||||||
13 | SMI# | X | SMI# pin to the GX | X | ||||||||
14 | SMB_CLK | - | - | SMBus clock | - | X | - | X | ||||
15 | SMB_DATA | - | - | SMBus data | - | X | - | X | ||||
16 | LPC_AD0 | - | - | Defaults to LPC - no GPIO control | ||||||||
17 | LPC_AD1 | - | - | Defaults to LPC - no GPIO control | ||||||||
18 | LPC_AD2 | - | - | Defaults to LPC - no GPIO control | ||||||||
19 | LPC_AD3 | - | - | Defaults to LPC - no GPIO control | ||||||||
20 | LPC_DRQ_L | - | - | Defaults to LPC - no GPIO control | ||||||||
21 | LPC_SERIRQ | - | - | Defaults to LPC - no GPIO control | ||||||||
22 | LPC_FRAME_L | - | - | Defaults to LPC - no GPIO control | ||||||||
24 | WORK_AUX | X | Controls MAIN_ON (which controls VCORE_CPU) | X | X | |||||||
25 | SWI# | X | Unknown - line comes from GPIO2 on the EC | |||||||||
26 | PWR_BUT_in | N/C | X | Lid event | X | X | ||||||
27 | SCI# | X | SCI from the EC for power and battery events | X | X | |||||||
28 | PWR_BUT# | X | Power button input | X | X |
Changes
Jan 15, 2007 (B2)
- GPIO1 changes from AC_BEEP to MIC_AC#/DC output
- GPIO10 changes from unused to THRM_ALARM input
- GPIO26 changes from unused to PWR_BUT_in input