XO1.75 A2 A3 Changes: Difference between revisions

From OLPC
Jump to navigation Jump to search
No edit summary
No edit summary
 
Line 1: Line 1:
These are the changes planned for the [[XO_1.75_B1|XO-1.75 B1 prototype]], from the [[XO_1.75_A2|A2 prototypes]].
These are the changes planned for the [[XO_1.75_A3|XO-1.75 A3 prototype]], from the [[XO_1.75_A2|A2 prototypes]].


=A2 Electrical Fixes=
=A2 Electrical Fixes=

Latest revision as of 05:46, 22 July 2011

These are the changes planned for the XO-1.75 A3 prototype, from the A2 prototypes.

A2 Electrical Fixes

These changes fix problems in the A2 prototypes:

SD power

These correct a mistake in Embedded Controller pin assignments for the SD power control signals.

  • Depopulate R335 and R345.
  • Remove Q16, and short pins 2 and 3 (marked I and O).
  • Remove Q21, and short pins 2 and 3 (marked I and O).

VMEM stability

This corrects an undercompensation of the +1.5V memory power supply, and also delays the turn-on of the memory termination power supply.

  • Change PR49 to 22K.
  • Change PR52 to 47K.
  • Populate PC37 with 0.1 uF.

eMMC

  • Populate R95 with 10K.
  • Connect BOOT_DEV_SEL to CN21.10
  • Use +3.3V_SD1 to power the eMMC instead of +3.3V_NAND

J2

The MISO and MOSI pins on J2 are swapped (the SOC GPIO map was wrong).

  • SPI_MISO should be connected to U10.2, J2.1, and U11.AD15 (GPIO43)
  • SPI_MOSI should be connected to U10.5 , J2.4, and U11.AE15 (GPIO44)

A2 Layout Fixes

  • Bring GPIO04 (pin 5) to a user-probeable pad, for brick recovery purposes. (It may need to be grounded during EC flash reprogram.)

Planned Feature Changes